Second Prototype: Schematic

The first cut at the second prototype schematic is done. The block diagram is nearly the same as the previous post but check it out for some changes. I am currently working on the bill of material so some parts may change. Also, this design does not include a connection to Insteon. So, more changes to come...

  1. Block Diagram
  2. A few things have been moved around.

    The Insteon module (not currently implemented) will be an I2C connection and will share the same bus as the TAS5504 and the WM8580.

    The Input-Output (WM8580) module has three I2S interfaces now. One interface for the phyCORE (MPC5200) to send data to the output (DACs or S/PDIF), one interface for phyCORE to receive data from the input (ADC and S/PDIF) and one interface to send data directly to the Amplifier (TAS5504).

    The Boot UART has been moved to Programmable Serial Controller 6. It shares this port with the IrDA interface.

    The SDIO flash drive support has been moved to the SPI interface in the Timer Group.

    GPIO lines are now scattered around various groups (PSC3, Timers and Dedicated GPIO lines).

  3. Amplifier
  4. The Amplifier supports both BTL and SE operation. Make sure to follow the jumper settings for Headers 1 thru 10. Setting the jumpers wrong will cause serious damage to the amplifier. (tyler: I just noticed that the header labels in the tables are wrong. I will correct them in the next pass).

    Notice that chip U1 is connected to GPIO line 7. A high on this line will make the amplifier source its music from the CPU. A low on this line will make the amplifier source its music from the output of the WM8580. This makes it possible to bypass the CPU when legacy devices are connected.

    The funny looking circuit at the bottom of the page has two purposes. First, it creates a virtual ground (half of PVDD) when the amplifier is in SE mode. It also holds off the amplifier until the power is up and running by asserting the 'backend error' line.

  5. Ethr-IrDA-Serial-SDIO
  6. This is a 'catch all' page with four simple circuits on it. First, the Ethernet connector (with integrated magnetics) is connected to the Ethernet PHY. phyCORE has the Ethernet phy already. Second, it has a UART driver and connector. Third, it has the SDIO connector for the flash cards. And lastly, it has a IrDA transceiver.

  7. Input-Output
  8. External devices are connected to DigiSpeaker via a WM8580 from Wolfson Electronics. This device is a stereo input ADC, S/PDIF transceiver and six-channel output DAC. It is controlled via an I2C interface and has two separate I2S interfaces.

    The primary I2S interface is split into separate receive and transmit sections. The part does this so that it is possible to route incoming data (via the ADC or S/PDIF receiver) to the CPU while the CPU routes outgoing data to connected devices (via the DACs or s/PDIF transmitter). DigiSpeaker takes advantage of the I2S interfaces by routing the primary I2S receiver to PSC2 of the MPC5200, the primary I2S transmitter to PCS3 of the MPC5200 and the secondary I2S transmitter to the TAS5504 directly. This give DigiSpeaker very flexible data routing.

    Each channel of the ADC has an anti-aliasing filter on the front of it to minimize the noise to the ADC.

    Each channel of the DACs has a two-pole low-pass filter (corner frequency = 50KHz) and DC blocking capacitor. They also have a small amount of amplification (2x). Notice that the primary I2S transmitter has three inputs to source the three DACs. However, DigiSpeaker only has a single stream of stereo data. The second and third primary inputs are connected to the first so the data is replicated on all three DACs.

  9. miniPCI
  10. The miniPCI connector has all the required PCI control, address and data lines. Both +5V and +3.3V are supplied. The inserted card can not consume more than 500mA.

    The Local Bus signals of the MPC5200 have been routed to the reserved pins of the miniPCI connector. The idea here is to use these pins to control a flash chip(s) mounted on a miniPCI card. Chip Selects 1 thru 3 have also been routed to the chip. Although phyCORE does not route Chip Select 0 (the Boot Chip Select) to the miniPCI connector, it is believed that the production DigiSpeaker will be able to boot from a miniPCI card with a few jump changes. The advantage here is that 'bricked' DigiSpeakers could be recovered in the field by changing a few jumpers and inserting a 'boot card' into the miniPCI connector.

  11. phyCORE
  12. The phyCORE schematic has all the signal assignments for the system. Check it our for CODEC and GPIO line mappings.

  13. Power
  14. The prototype will require two external power supplies. The first is a Digital Supply and is required to supply both +-15V to +-20V. The second is an Analog Supply that supplies 0V to +32V .

    The signals supplied by the Digital supply are cut down to +-12V, mostly to drive the gates of the Amplifier but are also used as the voltage rails for the op-amps. A 3A, 5V signal is also created from the +12V line. This voltage, in turn, is used to create a 2.5A, 3.3V signal that powers most of the DigiSpeaker logic.

    The signals supplied by the Analog supply are not regulated. The external supply is expected to not exceed 32V.

    All the signals are fitted with an LED that lights up when power is supplied. Not sequencer or monitor is used. The phyCORE module has a 'power good' module that holds the CPU in reset until all the power levels are up and stable.

  15. USB
  16. USB driver and power source.