Third Prototype: Block Diagram

The block diagram of the third prototype can be found here. You will have to zoom in quite a bit with this diagram. This diagram is the front page of the third prototype schematics and I still don't have a good/free method for translating DXF files to PDF yet.

Notice that there are actually three separate systems in this block diagram connected to a common controller design. The intention is to build a single PCB, but change its function by including/removing certain parts. The three systems are:

  1. Embedded. The Embedded Model is intended to be the unit that is installed in ceilings and walls of homes. It is assumed that this system will not have direct connections to external music sources so it does not have an I/O module. Of course, it does have an amplifier.
  2. Desktop. The Desktop Model is intended to be an standalone unit that might sit on a desk or table in a room. This unit has the potential to be directly connected to legacy music sources so it does include an I/O module. Of course, it also includes an amplifier.
  3. Media Center. The Media Center unit does not include an amplifier. This unit is intended to be used with other media equipment in a cabinet so it does have an I/O module. However, it is assumed that the music is shipped out to other amplifiers (including other DigiSpeakers) so it does not include an amplifier.

The controller is a Freescale MPC5200. Its subsystems have been assigned as follows:

  1. Clocks and Reset. A 33MHz crystal will be used to set the MPC5200 clock speed to 528MHz (fastest setting). Soft and hard (button) resets will be supported.
  2. JTAG. We are going to use JTAG to program the embedded Flash during production. We hope to make our own simple JTAG system for doing boundary scan on the MPC5200 and leave in-circuit debugging for later when we can afford a nice JTAG system.
  3. SDRAM Memory Controller. We are going to add 64MBytes of DDR266 memory (MT46V16M16P-75 or equivalent). Jon says that will be plenty of memory. We might back this down to 32MBytes depending on price. Right now, there isn't much difference. Notice that the 128MBits and 256MBits share the same package footprint.
  4. Local Bus. The MPC5200 boots on chip select zero of the local bus. We are going to put 8MBytes of NOR Flash at chip select zero as the boot ROM. More than likely, it will be a Spansion S29GL064. Jon thinks that 8MBytes might be a little tight (compressed kernel + root file system is about 6Mbytes). If so, we will up the flash memory to 16MBytes with a Spansion S29GL128N. The two packages have the same footprint.
  5. ATA Bus. Not used
  6. PCI Bus. The MII of the MPC5200 is used for the powerline modem so a PCI to Ethernet bridge is used on this port to give the system cabled Ethernet. We are going to use the KSZ8841-PMQL from Micrel.
  7. PSC1. The audio clocks that the MPC5200 can generate are not very accurate, especially at 192KHz. To fix this problem, we have added an external audio clock to the design. To cut down on the amount of external logic it might take to integrate the clock, we decided to put a couple of the serial ports on the MPC5200 into 'cell phone' mode. This mode allows an external clock to be input on one port and then used as a master clock for another port. The 'master' cell phone port is PSC1. In the case of the Embedded system, we are using the MAX9485 from Maxim. For the other systems, we are using the integrated clock of the WM8580 from Wolfson.
  8. PSC2. The second serial port of the MPC5200 is used as the slave cell phone port. This port receives a master clock from the first serial controller and uses it to compute bit and frame clocks for an I2S connection to the PWM modulator (TAS5504 from TI). Notice that in the case where music is being sourced from an external device, the MPC5200 can be bypassed with a direct connection from the WM8580 to the TAS5504.
  9. PSC3. This port is split between a UART and SPI connections. The UART is connected to an RS232 driver and is used as the boot monitor. The SPI connections is used as the connection to a mass storage device (SD Card or MMC).
  10. PSC4. This is the USB port. Right now, the USB connection is unassigned. However, it can be used for more mass storage or a WiFi module connection.
  11. PSC5. This port contains an Ethernet controller that is normally connected to an Ethernet PHY. However, the powerline modem chipset (INT5500CS) acts like an Ethernet PHY and expects an MII to a controller. So, this port is connected to the powerline modem and cabled Ethernet is supported via the PCI bus.
  12. PSC6. The port is used at the serial connection to the Insteon controller. The Insteon controller connects directly into the powerline and can receive and send commands from/to other Insteon devices. This is one way the unit can be remotely controlled.
  13. Timers/GPIO. Various control signals are implemented with the Timer pins in GPIO mode. Examples are Mute, Reset, PowerDown, ...etc.
  14. Dedicated GPIO. The Infrared receiver is connected to these pins so the user can control the device with a simple IR remote. These pins have wakeup capability so they can be used to get the system out of sleep mode.
  15. Power. The power supply is split into two sections roughly corresponding to Digital and Analog power. The Analog supply is a variable power supply (+32V to 0V) that can be controlled by the volume control of the PWM modulator. The Digital supply has a separate controller and outputs the various fixed system voltages.