I bought an Atmel Raven development kit so that I can work with Zigbee.

The LR44 batteries that came with the board lasted 48hrs. So I needed a permanent power solution. The simplest way to power a Raven board is via a USB cable. Cut the end off from it to get at the wires inside. Solder red(+5)/black(GND) to the PCB. Note that you hook power up on pins 1/2 of J401 - not where the power jumper is located. +5 on pin 1, GND on pin 2. Use a powered hub as a power supply and you can move the boards away from your PC.

The demo firmware that comes with the boards, is for.. demos. I quickly figured out that I needed to write new firmware. Of course I don't have any way to load this new firmware into the device. I have to get a JTAG that works with Atmel products like the AVR JTAGICE mkII. Lucky for me Arrow is running a half price sale on the JTAG unit. $150 plus $8 shipping is cheaper than you can buy a clone unit from China.

Now I need to start learning about 802.15.4, 6LoWPAN, Zigbee profiles, etc...

Siemens has started an open source Zigbee implementation for Linux. But as soon as I started looking at it I discovered that the license from the Zigbee alliance for using the Zigbee spec is incompatible with the GPL. A request has been made to the Zigbee alliance to fix their license so that it is GPL compatible. We don't have an answer back from them yet.

We are primarily focused on using Insteon in our product, but we are hedging out bets. There is another set of licensing complications around Insteon that we haven't resolved with Smart Labs.

I looked a little at Z-wave. Like Insteon, Z-wave is controlled by a single vendor, Zensys. I haven't explored the licensing world of Z-wave yet.

As part of a deal with Phytec I wrote an AC97 driver for their mpc5200 development system. We use these Phytec boards as a prototype platform. They are reasonably priced and they work well.

The code for this driver has already been accept for the Linux kernel and it will appear in 2.6.31. AC97 and I2S are both implemented by the same PSC block on the SOC. This code will become the basis for the tri-amp Digispeaker I2S driver.

While I was at it I also implemented AC97 support for the Efika. The Efika is a $99 mpc5200 based development board available from Directron. The Efika was useful for driver development since it has USB and a PCI slot. The current version of the Phytec development system has now added these features making the Efika less useful. Note that it is hard to add custom hardware to an Efika since they didn't bring all of the pins out form the CPU.

My urjtag changes have been accepted into mainline svn as of version 1464.

I'm still messing around with getting my u-boot changes for the Phytec pcm030 accepted. About half of them are in, but the main one adding the board support is still under review.

Currently I'm writing a u-boot app for initializing the Intellon hardware.

Learned that this is needed to keep the linker from adding 64KB of zeros to my 10KB apps.
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }

U-boot supports network console. Add this to the board config file:

#define CONFIG_NETCONSOLE 1

Rebuild and reflash your image.
Then tell uboot where your desktop is and redirect the console.

uboot> set ncip 192.168.1.4
uboot> set stdin nc; set stdout nc

Start nc (network cat) on your desktop.

jonsmirl@terra:/home/apps/u-boot$ nc -u -l -p 6666 < /dev/null &
[1] 5444
jonsmirl@terra:/home/apps/u-boot$ nc -u 192.168.1.11 6666

And now you're connected. Next I have to figure out how to make this the boot default.

I made a git tree for urjtag at git.digispeaker.com. It contains my patches to make a Phytec pcm030 work. Note that I had to revise the previous posting of instructions on using urjtag due to some problems I later found.

The concept of a bus in urjtag is not the same as a bus on the mpc5200. The mpc5200 has one local bus. That one bus can be in various modes controlled by pins sampled at reset. The local bus then allows different regions containing 8, 16 or 32 bit devices.

In urjtag these two things are combined. You also can't delete a bus once it is loaded. So when urjtag starts it defaults to non-multiplexed, 24b address and 8b data on bus 0. I implemented 25b address, 16b data with a multiplexer. When you initbus with the mux parameter it becomes bus 1. You use "bus 1" to switch to this new bus. This was very confusing to me since my chip only has one bus and urjtag has defined two.

Code is in the git tree. It's just a snapshot of their SVN plus my fixes. I'll keep it updated as I get my patches accepted or I find more bugs.